Ultra low-voltage floating-gate transconductance amplifier

The minimum supply voltage in low-voltage circuits can be defined as Vsup,min = 2(Vgs+Vsat) [1]. Low-voltage circuits are able to operate on a supply voltage of two stacked gate-source voltages and two saturation voltages. Differential amplifiers are biased with a transistor feeding a differential pair, where the current level is set by the bias transistor. The minimum input voltage in a NMOS input pair is given by Vbias + nVdsat < Vin < Vdd, where n is the slope factor modeling the body effect [2]. The bias voltage is linearely dependent to the threshold voltage for a given bias current. To provide a cut-off frequency in the MHz range the bias transistor can not be operated in deep weak inversion, hence the input voltage and supply voltage are limited by the threshold voltage and the saturation voltage and the body effect (Vinmin , Vdd > 1V ). By eliminating the bias transistor we can decrease the supply voltage further (to n4UT ≈ 200mV ). The challenge is therefore to design a differential input stage without the traditional differential pair. Current mode analog circuits using the floating-gate transistor [3] and the floating-gate approach can be exploited to design ultra lowvoltage analog and digital circuits [4], [5], [6], [7]. In this paper we exploit the multiple input FGUVMOS transistor to design a ultra lowvoltage rail-to-rail OTA . Assuming that the circuit operates in weak inversion the output current of the TANH-shaped ULV OTA with inputs V1 and V2 can be expressed as